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Mayank Panchal

Conference · 2025

VLSID 2026

39th International VLSI Design Conference

Last year’s conference site for the 39th VLSI Design and 25th Embedded Systems editions - a dual-venue programme in Pune, January 2026.

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VLSID 2026 - interface screenshot
Role
Web Developer
Client
VLSI Society of India, Pune
Year
2025
Category
Conference

Overview

For VLSID 2026 we shipped the official site for Global Synergy in Silicon - VLSI and Embedded AI for next-gen electrified mobility. The programme split across MIT World Peace University (tutorials, 3–4 January) and JW Marriott Pune (main conference, 5–7 January), with 2,000+ attendees, keynotes, partners from Cadence, Intel, Qualcomm, Siemens, AMD, and a full author/forum stack. The build had to present two venues, a dense speaker roster, and sponsor tiers without burying Call for Papers, registration, or travel.

Highlights

  1. 01

    Dual-venue programme (MIT WPU tutorials + JW Marriott main conference)

  2. 02

    Keynote, leader, and partner grids for a 2,000+ attendee edition

  3. 03

    Author tracks: papers, tutorials, design contest, tape-out, fellowship

  4. 04

    Sponsorship, exhibitor, and registration flows for VSI’s sister-DAC event